- The Rs 5 crore project, Radio Frequency (RF) Transceiver System on Chip (SoC) with integrated RISC V core for Sub-GHz Applications, will be done in collaboration with Semiconductor IP company, Silizium Circuits Private Limited.
- The SoC will drive innovations in the IoT and indoor applications and its revenues are forecast to be around $ 1.3 trillion in 2030.
- The Chip to Startup (C2S) Program is an initiative launched by MeitY to foster next generation capabilities among chip designers for making India self-reliant in electronics system design.
- IIT Kanpur is the nodal agency responsible for the overall implementation of the project and Silizium Circuits with their RFIC and IC design expertise will contribute to the productization and commercialization of the chip
- The SoC on development will have a RF (radio-frequency) front end capable of transmitting in sub-1GHz UHF frequencies and will form the backbone of most of the long, short-range, wide, and narrowband communications
India, 08 June 2023: The Indian Institute of Technology (IIT) Kanpur jointly with Silizium Circuits Private Limited has bagged a Rs 5 crore Grant-in-Aid project from the Ministry of Electronics and Information Technology (MeitY)’s Chips to Startup (C2S) program for its ground-breaking project, “Radio-frequency (RF) Transceiver SoC (System on Chip) with integrated RISC V core for Sub-GHz Applications”.
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Prof Abhay Karandikar, Director IIT Kanpur said, “IIT Kanpur has always been fostering innovation, promoting entrepreneurship, and driving technology commercialization and the Chips to Startup (C2S) project is part of this ongoing drive. The project, that aims at the formulation of an SoC supporting all the prominent standards in sub GHz, will drive innovations in the IoT and indoor applications. The development has tremendous market size and will put India in a stronger position with respect to a complex SoC research and development.” The project duration is 3 years and IIT Kanpur as the nodal agency will be responsible for the developing of significant mixed signal IPs and Silizium Circuits will design the RF Front End and System-On-Chip (SoC) along with commercialization.
Mr. Rijin John, Co-founder and CEO Silizium Circuits said “Semiconductor IPs (Intellectual Property) will be the brain of all hardware devices. Such an SoC supporting all prominent standards in sub GHz will drive innovations in the IoT and indoor applications whose revenues are forecast to be around $1.3 trillion by 2030. In addition to the final SoC, the IPs such as ADCs (Analog to Digital Convertors), PLL (Phase Locked Loops) and RF front end will also be developed which can target another $488 billion global market. All the low-power applications worldwide infuture will require an ultra-low power receiver since it has to be alert to an incoming signal at all times.”
Dr. Arun Ashok, Co-founder and CTO explains “The developed SoC will have an RF front end capable of transmitting in sub-1GHz UHF frequencies and will be compatible with various standards like LoRa, 802.15.4 WLAN, ZigBee, WiSUN and also supports modulation formats like FSK/ MSK/ 4-FSK/ GFSK/GMSK/ ASK/ FSK/ FM / PSK hence forming the backbone of most of the long, short-range, wide and narrowband communications. Together with the RF front end, the designed SoC will also house an indigenous RISC-V core powered with SHAKTI/VEGA processor enabling support of a multitude of modulation formats for the above-mentioned standards.”
Prof Imon Mondal, Prof Chithra and Prof R. S. Ashwin Kumar from IIT Kanpur and Dr Arun Ashok and Mr. Rijin John from Silizium Circuits are the investigators of this project. The project is backed by the end-user ATWIC R&D which is an innovative establishment focused on developing electronics systems and subsystems.
Prof Imon Mondal, Department of Electrical Engineering, IIT Kanpur said, “This SoC is positioned uniquely to address the needs of several wireless segments and applications such as Sub-GHz WiFi, Narrowband IoT, Electric meters, and Secure wireless Infrastructure, besides being a critical aspect of secure wireless infrastructure.”
The segments described above can be referred to as Internet-of-things or Machine-to-Machine Communication (MMC) where multitude of sensors are communicating with each other wirelessly. The number of such devices in use exceeded 7.6 billion in 2019 and is expected to exceed 24 billion in 2030. Since many form the backbone of several utilities, telecommunication, automotive, consumer and industrial infrastructures, such devices require secure wireless infrastructure and hence are penultimate for national security.
IIT Kanpur and Silizium Circuits consider this project as a pivotal point in the India’s Semiconductor ambitions. Although Indian engineers contribute significantly to the Microelectronics, most of activities were limited in service sectors. The ecosystem has undergone significant changes with many startups in this field with the support of MEITY R&D grants and DLI scheme.
About IIT Kanpur:
Indian Institute of Technology (IIT) Kanpur was established on 2nd November 1959 by an Act of Parliament. The institute has a sprawling campus spread over 1055 acres with large pool of academic and research resources spanning across 19 departments, 22 centres, and 3 Interdisciplinary programs in engineering, science, design, humanities, and management disciplines with 540 full-time faculty members and approximately 9000 students. In addition to formal undergraduate and postgraduate courses, the institute has been active in research and development in areas of value to both industry and government.
About Silizium Circuits:
Silizium Circuits is a Fabless Semiconductor IP Company focusing mainly on wireless domain. The company was awarded the prestigious “The Most Promising Semiconductor Start-up Award” by Indian Electronics and Semiconductor Association (IESA) in 2022. The successfully taped-out semiconductor chip was unboxed recently at the G20-Digital Innovation Alliance event at Maker Village. Since inception, Silizium Circuits has received more than Rs 2 crore through various grants and has designed several IPs in the RF- Analog domain. Many of Silizium Circuits IPs are qualified to be ported/reused for the proposed RFSoC development. The IPs available with Silizium Circuits that will be used are Low Noise Amplifiers for L1, L5 and S band of navigation, NaVIC Analog Baseband and Digital SPI based Control IP.
Chip to Start-up (C2S) Program:
The Chip to Startup(C2S) Program is an initiative launched by MeitY to Foster Next Generation Capabilities among Chip designers For making India Self-Reliant in Electronics System Design. C2S not only aims at developing Specialized Manpower in VLSI/Embedded System Design domain but also addresses each entity of the Electronics value chain via Specialized Manpower training, Creation of reusable IPs repository, Design of application-oriented Systems/ASICs/FPGAs and deployment by academia/ R&D organization by way of leveraging the expertise available at Start-ups/MSMEs.
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